Imagination：JD - MIPS CPU Design Senior Verification Engineer
Sector: HW2 (CEC)
Location: Shanghai, China
Imagination Technologies is one of the world’s fastest growing and most exciting technology companies. Rapidly climbing the FTSE250 on the London Stock Exchange, the breadth of technologies and markets it serves involves working with most of the biggest and best semiconductor, consumer electronics, multimedia and App content developers and industry partners in the world. Our technologies feature in many of the world’s most exciting products, from the latest smartphones, tablets and media players to the future wireless home, connected multimedia-rich cars and much more.
Situated in Shanghai, the China-Engineering-Center MIPS hardware group is responsible for developing and promoting the MIPS architecture CPUs.
This role offers a great opportunity to contribute to the verification of MIPS CPU with industry leading methodologies and tools.
You will work with other engineers who design the hardware and software of the MIPS product. The focus of this position is to develop complex CPU and coherence models in System Verilog and UVM technology. This is a senior role and will require an experienced technical background and strong sense of quality assurance. Applicants should have a desire and tenacity to tackle complex technical problems.
Senior Engineering Manager
Imagination Technologies China, Rm. 1712, Shui On Plaza, 333 Huai Hai Zhong Road, Luwan District, Shanghai 200021, PRC.
None expected. Though, upon project needs, optional travel to US/UK office may be recommended.
Working as a part of a team, you will have some or all of the following responsibilities:
● Reviewing design specifications, developing the verification strategy and test plan
● Functional verification of the design to achieve verification goals
● Develop complex scoreboards in System Verilog, C and UVM technology to verify CPU microarchitecture
● Develop testbench to aid verification work including assertions/checker/coverpoints.
● Understand architecture and microarchitecture of the MIPS CPU
● Open discussion, presentation, documentation
● Mentor or lead junior engineers
● Strong microprocessor architecture and micro-architecture knowledge.
● Strong working knowledge in System Verilog, C and UVM
● Experienced with CPU design verification, debug, and testing methodologies.
● Experienced with building test environments, test benches, checkers, test vectors, assertions, coverage analysis
● Strong communications skills and capability to describe in detail all aspects of design verification
The successful candidate will have:
● Self-starter – able to work both alone and as part of a team
● “Can-Do” approach to workload,
● Friendly - outgoing personality, gets on with all types of people
● Tenacious - determined not to let anything stop getting the job done
● Open - enjoys working in an informal environment
● Dedicated - willingness to work from time to time over extended hours in order to achieve goals set by immediate manager or demanded by business
● A passion for excellence and attention to detail
● Team player - will understand the value of being a team player and willingness to help others
● Leadership – will step up to take responsibility when necessary, willing to teach and mentor others, will carry himself / herself professional. Will lead by example.
You will be working small teams of engineers with a wide range of experience levels.
● Education – BS in EE or CS (MS or higher preferred).
● Experience – Five to ten years experience or more in related area.
● Systems – Unix, Linux, Windows.
● Language – English fluency is a must
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